This book presents the art of advanced MOSFET modeling for integrated circuit simulation and design. It provides the essential mathematical and physical analyses of all the electrical, mechanical and thermal effects in MOS transistors relevant to the operation of integrated circuits. Particular emphasis is placed on how the BSIM model evolved into the first ever industry standard SPICE MOSFET model for circuit simulation and CMOS technology development.The discussion covers the theory and methodology of how a MOSFET model, or semiconductor device models in general, can be implemented to be robust and efficient, turning device physics theory into a production-worthy SPICE simulation model.Special attention is paid to MOSFET characterization and model parameter extraction methodologies, making the book particularly useful for those interested or already engaged in work in the areas of semiconductor devices, compact modeling for SPICE simulation, and integrated circuit design.Contents:BSIM and IC Simulation:Circuit Simulation and Compact ModelsBSIM — The BeginningBSIM3 — A Compact Model Based on New MOSFET PhysicsBSIM3v3 — World's First MOSFET Standard ModelBSIM4 — Aimed for 130nm Down to 20nm NodesBSIM SOIImpact of BSIMLooking Towards the Future — The Multi-Gate MOSFET ModelThe Intent of This BookFundamental MOSFET Physical Effects and Their Models for BSIM4:Introduction and Chapter ObjectivesGate and Channel Geometries and MaterialsTemperature-Dependence Model OptionsThreshold VoltagePoly-Silicon Gate DepletionBulk-Charge EffectsLDD ResistancesFinite Charge ThicknessEffective MobilityLayout-Dependent Effects: Mechanical Stress and Proximity EffectsChapter SummaryParameter TableChannel DC Current and Output Resistance:Introduction and Chapter ObjectivesChannel Current TheorySingle Continuous Channel Charge ModelChannel Current in Subthreshold and Linear OperationsVelocity Saturation and Velocity OvershootOutput Resistance in Saturation RegionSource-End Velocity LimitChapter SummaryParameter TableGate Direct-Tunneling and Body Currents:Introduction and Chapter ObjectivesGate Direct-Tunneling Current Theory and ModelBody CurrentsSummary of BSIM4 Branch and Terminal DC CurrentsChapter SummaryParameter TableCharge and Capacitance Models:Introduction and Chapter ObjectivesMOSFET Capacitance TheoryIntrinsic Charge and Capacitance ModelsFringing and Overlap CapacitancesChapter SummaryParameter TableNon-Quasi-Static and Parasitic Gate and Body Resistances:Introduction and Chapter ObjectivesGate Electrode ResistanceGate Intrinsic-Input Resistance for Non-Quasi-Static ModelingCharge-Deficit Transient and AC NQS ModelsBody Resistance NetworkChapter SummaryParameter TableNoise Models:Introduction and Chapter ObjectivesNoise Representations and ParametersBSIM4 Flicker Noise ModelsBSIM4 Channel Thermal Noise ModelsOther Noise SourcesChapter SummaryParameter TableSource and Drain Parasitics: Layout-Dependence Model:Introduction and Chapter ObjectivesConnections of a Multi-Transistor StackSource and Drain of a Transistor With Multiple Gate FingersGEOMOD: The End-Source and End-Drain of a Multi-Finger TransistorSource and Drain Area and Perimeter CalculationSaturation Junction Leakage Current and Zero-Bias Capacitance ModelsSource and Drain Contact Scenarios and Diffusion ResistancesRGEOMOD: Selecting A Source and Drain Contact Scenario for GEOMODChapter SummaryParameter TableJunction Diode IV and CV Models:Introduction and Chapter ObjectivesPhysical Mechanisms of Diode DC CurrentsBSIM4 Diode DC IV Model [4]BSIM4 Junction Leakage Due to Trap-Assisted Tunneling [4]BSIM4 Diode Charge and Capacitance [4]Diode Temperature-Dependence Model [4]Chapter SummaryParameter TableSPICE Implementation Example: The Methodology with BSIM4 Transient NQS:Introduction and Chapter ObjectivesReview of the Charge-Deficit Transient NQS ModelTime Discretization, Equation Linearization and Matrix StampingComposite Stamps for Transient NQS ModelBypassConvergence CheckingChapter SummaryMulti-Gate Transistor Model:Introduction and Chapter ObjectivesAdvantages of FinFETs Over Planar CMOSBSIM-CMGModel ValidationChapter SummaryReadership:Undergraduate and graduate students, and engineers interested in semiconductor devices, compact modeling for SPICE simulation, and integrated circuit design.